The present invention relates to a semiconductor device manufacturing method and a semiconductor device technique. Particularly, the present invention is concerned with a technique applicable effectively to a resin sealing technique for a semiconductor device which adopts a flip-chip mounting method.
The flip-chip mounting method is one of mounting methods for mounting a semiconductor chip onto a wiring substrate through bump electrodes (protrude electrodes). In connection with the flip-chip mounting method, as a method for injecting resin into the gap between a semiconductor chip and a wiring board, there is known a method wherein liquid resin is added dropwise to a part of the outer periphery of the semiconductor chip and the resin, in a softened state by heating, is penetrated into the gap between the semiconductor chip and the wiring substrate by utilizing the capillary phenomenon. According to this method, however, since the injection of resin is performed for each semiconductor chip, it takes time for the injection of resin and thus the productivity is low; besides, the resin itself is expensive, resulting in that the cost of the semiconductor device becomes high.
On the other hand, as a semiconductor chip sealing method, there is known an MAP (Mold Array Package) method wherein plural semiconductor chips are mounted on a wiring substrate, then are covered all together with a sealing resin, and are then cut out into individual semiconductor chips. According to this method, since plural semiconductor chips can be sealed all together, it is possible to shorten the sealing time and improve the productivity of semiconductor devices. Besides, the cost of the sealing material itself is about one tenths of that in the foregoing known method and is thus much lower. Consequently, it is possible to reduce the cost of each semiconductor device manufactured.
However, if the above MAP method is adopted in the flip-chip mounting method, since the gap between the semiconductor chip and the wiring substrate is narrow, the sealing resin cannot sufficiently be injected into the gap, thus giving rise to the problem that voids are formed. If voids are formed due to insufficient injection of the sealing resin into the gap between the semiconductor chip and the wiring substrate, there arise the problem that mutually adjacent bump electrodes melt at the time of heat treatment after the sealing step and are short-circuited through the voids and the problem that the bump electrodes are apt to be disconnected due to deformation of the wiring substrate and a sealing body caused by a temperature cycle after the sealing step.
A countermeasure to the formation of such voids in the semiconductor device which adopts the flip-chip mounting method is described in, for example, Japanese Unexamined Patent Publication No. Hei 11(1999)-121488. It is described therein that the interior of a molding die cavity is brought into a state of reduced pressure in a resin sealing step, whereby a sealing resin can be injected uniformly into the gap between a semiconductor chip and a wiring substrate (see Patent Literature 1). Further, for example in Japanese Unexamined Patent Publication No. 2001-135658 it is described that, by reducing the internal pressure of a molding die cavity in a resin sealing step, molten resin can be injected stably into the whole of the interior of the cavity while suppressing the formation of voids (see Patent Literature 2).
[Patent Literature 1]
Japanese Unexamined Patent Publication Hei 11(1999)-121488
[Patent Literature 2]
Japanese Unexamined Patent Publication No. 2001-135658
However, the present inventor has found out that the following problem is involved in the technique of reducing the internal pressure of a molding die cavity when sealing resin in the semiconductor device which adopts the flip-chip mounting method.
In the above Patent Literatures 1 and 2, a thorough consideration is not given to the occurrence of variations in thickness of wiring substrates. In an actual resin sealing step for a semiconductor device which adopts the flip-chip mounting method, even if the interior of a molding die cavity is brought into a state of reduced pressure, sealing resin cannot sufficiently be injected to the back side of the semiconductor chip lying within the cavity, especially into the gap between the semiconductor chip and the wiring substrate used, and voids may occur.
At present, molding dies are designed on the assumption that a lead frame is used as a semiconductor chip mounting member. Lead frames are almost constant in thickness, while wiring substrates vary in thickness with an increase in the number of constituent layers, and the range of error is also becoming larger. Sealing resin is injected into a cavity of a molding die while a part of a wiring substrate is crushed by the molding die lest the sealing resin should leak from the cavity in a sealing step. However, if the thickness of the wiring substrate placed within the molding die is larger than a preset value although it is within a tolerance, the proportion of the crushed portion of the wiring substrate becomes larger than a preset value and hence air vents in the molding die are closed with a portion of the wiring substrate. As a result, it becomes impossible to let the gas present within the cavity escape sufficiently to the exterior, thus giving rise to the problem that voids are formed. Especially in the case of the flip-chip mounting method, the problem of voids is apt to occur because the gap between the semiconductor chip and the wiring substrate is very narrow and tends to become still narrower. On the other hand, if the thickness of the wiring substrate placed within the molding die is smaller than the preset value although it is within the tolerance, the proportion of the crushed portion of the wiring substrate becomes excessively smaller than the preset value, so that the openings of air vents become larger than necessary, with consequent leakage of the sealing resin to the exterior from the air vents. Once the sealing resin leaks to an outer frame of the wiring substrate, it becomes impossible to effect automatic conveyance, thus giving rise to the problem that the yield and productivity in manufacturing the semiconductor device are deteriorated.